Got my port directions all bass-ackwards for some stupid reason

This commit is contained in:
XANTRONIX Development 2016-06-02 00:14:25 -05:00
parent 7562ab6870
commit f62f6ad71a

View file

@ -37,14 +37,14 @@ static volatile uint16_t i = 0,
static void spi_start() {
/*
* Configure MISO as output
* Configure MISO as input
*/
DDRB |= (1 << DDB4);
DDRB &= ~(1 << DDB4);
/*
* Configure MOSI as input
* Configure MOSI as output
*/
DDRB &= ~(1 << DDB3);
DDRB |= (1 << DDB3);
/*
* Configure SCK pin as output