Use the correct timer interrupt mask, TIMSK1

This commit is contained in:
XANTRONIX Development 2016-06-02 18:06:47 -05:00
parent 66f62e972a
commit d9007fc717

View file

@ -69,12 +69,12 @@ static void spi_start() {
/*
* Enable timer interrupt vector for match on OCR1A
*/
TIMSK0 = (1 << OCIE1A);
TIMSK1 = (1 << OCIE1A);
}
static void spi_end() {
DDRB &= ~((1 << DDB5) | (1 << DDB4) | (1 << DDB3));
TIMSK0 &= ~(1 << OCIE1A);
TIMSK1 &= ~(1 << OCIE1A);
TCNT1 = 0;
OCR1A = TIMER1_INTERVAL;
TCCR1B = (1 << CS10);