diff --git a/avr/send.c b/avr/send.c
index b13050e..2573e63 100644
--- a/avr/send.c
+++ b/avr/send.c
@@ -35,22 +35,37 @@ static volatile uint8_t device = 0x00,
 static volatile uint16_t i = 0,
                          b = 0;
 
+/*
+ * So like, we're abusing pins here.  So badly, it's beyond.  So here's what's
+ * going down: We want to retain the same physical I/O connections between
+ * both the sending and receiving flavors of the whole Game Boy Printer
+ * endeavor, and that means that we must absolutely bit bang MOSI and MISO
+ * opposite from their ordinary roles.  The reason being: There is no notion
+ * of MISO or MOSI from the Game Boy's (nor its peripherals') point of view.
+ * The SI and SO pins over a link cable are crossed over, so SI on one end
+ * always connects to SO on the other, and vice-versa.
+ */
 static void spi_start() {
     /*
-     * Configure MISO as input 
+     * Configure MISO as output...Oddly
      */
-    DDRB &= ~(1 << DDB4);
+    DDRB |=  (1 << DDB4);
 
     /*
-     * Configure MOSI as output
+     * Configure MOSI as input...Also oddly
      */
-    DDRB |= (1 << DDB3);
+    DDRB &= ~(1 << DDB3);
 
     /*
      * Configure SCK pin as output
      */
     DDRB |= (1 << DDB5);
 
+    /*
+     * Set output pins clear by default
+     */
+    PORTB &= ~((1 << PORTB5) | (1 << PORTB4));
+
     /*
      * Set timer clock divider to 1/1
      */
@@ -73,11 +88,12 @@ static void spi_start() {
 }
 
 static void spi_end() {
-    DDRB   &= ~((1 << DDB5) | (1 << DDB4) | (1 << DDB3));
-    TIMSK1 &= ~(1 << OCIE1A);
-    TCNT1   = 0;
+    PORTB  &= ~((1 << PORTB5) | (1 << PORTB4));
+    DDRB   &= ~((1 << DDB5)   | (1 << DDB4) | (1 << DDB3));
+    TIMSK1 &= ~ (1 << OCIE1A);
+    TCNT1   =   0;
     OCR1A   = TIMER1_INTERVAL;
-    TCCR1B  = (1 << CS10);
+    TCCR1B  =  (1 << CS10);
 }
 
 ISR(TIMER1_COMPA_vect) {
@@ -85,14 +101,14 @@ ISR(TIMER1_COMPA_vect) {
 
     PORTB |= (1 << PORTB5);
 
-    if (PORTB & (1 << PORTB4)) {
+    if (PINB & (1 << PINB3)) {
         value_in |= 0x80;
     }
 
     if (value_out & 0x80) {
-        PORTB |=  (1 << PORTB3);
+        PORTB |=  (1 << PORTB4);
     } else {
-        PORTB &= ~(1 << PORTB3);
+        PORTB &= ~(1 << PORTB4);
     }
 
     value_out <<= 1;