diff --git a/avr/send.c b/avr/send.c
index 47f166b..337585c 100644
--- a/avr/send.c
+++ b/avr/send.c
@@ -7,7 +7,6 @@
 #include <tabby/avr/uart.h>
 
 #define TIMER0_INTERVAL  1953
-#define PACKET_BODY_SIZE  640
 
 enum {
     TABBY_SEND_READING  =  0,
@@ -25,7 +24,7 @@ static volatile tabby_printer_packet header = {
     .size        = 0
 };
 
-static volatile uint8_t body[PACKET_BODY_SIZE];
+static volatile uint8_t body[TABBY_PRINTER_MAX_PACKET_SIZE];
 
 static volatile uint16_t sum = 0x0000;
 
@@ -36,14 +35,52 @@ static volatile uint8_t device = 0x00,
 static volatile uint16_t i = 0,
                          b = 0;
 
-/*
- * Internal clock source interrupt vector
- */
-ISR(TIMER0_COMPB_vect) {
-    if (!(flags & TABBY_SEND_BUFFERED)) {
-        reti();
-    }
+static void spi_start() {
+    /*
+     * Configure MISO as output
+     */
+    DDRB |= (1 << DDB4);
 
+    /*
+     * Configure MOSI as input
+     */
+    DDRB &= ~(1 << DDB3);
+
+    /*
+     * Configure SCK pin as output
+     */
+    DDRB |= (1 << DDB5);
+
+    /*
+     * Enable timer interrupt vector
+     */
+    TIMSK0 = (1 << TOIE1);
+
+    /*
+     * Reset timer counter to zero
+     */
+    TCNT1 = 0;
+
+    /*
+     * Set timer interval
+     */
+    OCR1A = TIMER0_INTERVAL;
+
+    /*
+     * Set timer clock divider to 1/1
+     */
+    TCCR1B = (1 << CS10);
+}
+
+static void spi_end() {
+    DDRB   &= ~((1 << DDB5) | (1 << DDB4) | (1 << DDB3));
+    TIMSK0 &= ~(1 << TOIE1);
+    TCNT1   = 0;
+    OCR1A   = TIMER0_INTERVAL;
+    TCCR1B  = (1 << CS10);
+}
+
+ISR(TIMER0_COMPB_vect) {
     value_in >>= 1;
 
     PORTB |= (1 << PORTB5);
@@ -83,6 +120,8 @@ ISR(TIMER0_COMPB_vect) {
             b      = 0;
             flags &= ~TABBY_SEND_BUFFERED;
             flags |=  TABBY_SEND_COMPLETE;
+
+            spi_end();
         }
 
         bits = 8;
@@ -97,43 +136,6 @@ ISR(TIMER0_COMPB_vect) {
     PORTB &= ~(1 << PORTB5);
 }
 
-static void clock_setup() {
-    /*
-     * Configure MISO as output
-     */
-    DDRB |= (1 << DDB4);
-
-    /*
-     * Configure MOSI as input
-     */
-    DDRB &= ~(1 << DDB3);
-
-    /*
-     * Configure SCK pin as output
-     */
-    DDRB |= (1 << DDB5);
-
-    /*
-     * Enable timer interrupt vector
-     */
-    TIMSK0 = (1 << TOIE1);
-
-    /*
-     * Reset timer counter to zero
-     */
-    TCNT1 = 0;
-
-    /*
-     * Set timer interval
-     */
-    OCR1A = TIMER0_INTERVAL;
-
-    /*
-     * Set timer clock divider to 1/1
-     */
-    TCCR1B = (1 << CS10);
-}
-
 static uint16_t checksum() {
     uint16_t sum = 0;
     size_t i;
@@ -154,7 +156,7 @@ int main() {
 
     uart_init();
 
-    clock_setup();
+    spi_start();
 
     sei();
 
@@ -237,6 +239,8 @@ int main() {
                         i      = 0;
                         b      = 0;
                         flags |= TABBY_SEND_BUFFERED;
+
+                        spi_start();
                     }
                 }
             }